Sunday, January 3, 2016

UDOO Neo and openocd working

With the help of IIRC openocd able to create a configuration file for openocd to connect to the M4 DAP and able to halt and reset just the M4 processor.

I'm using an old Amontec JTAGkey (using FTDI 232 chip) here is a photos of the wiring.


Using the imx6sx.cfg file and the following command to connect to M4.

sudo  ./src/openocd -f interface/ftdi/jtagkey.cfg -f ./tcl/target/imx6sx.cfg

Output:

Open On-Chip Debugger 0.10.0-dev-00023-g8590315 (2016-01-02-19:34)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
adapter speed: 1000 kHz
Warn : imx6sx.sdma: nonstandard IR value
Warn : imx6sx.sjc: nonstandard IR value
imx6sx.dapM4
Info : clock speed 1000 kHz
Info : JTAG tap: imx6sx.dapM4 tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Info : JTAG tap: imx6sx.dapA9 tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Info : TAP imx6sx.sdma does not have IDCODE
Info : JTAG tap: imx6sx.sjc tap/device found: 0x0891c01d (mfg: 0x00e, part: 0x891c, ver: 0x0)
Info : imx6sx.dapM4: hardware has 6 breakpoints, 4 watchpoints


Then start a gdb session:
./arm-none-eabi-gdb

(gdb) tar ext :3333   <---- connects to openocd
Remote debugging using :3333
(gdb)  monitor  halt    <------------- halts only M4
(gdb)  monitor  reset   <------------ reset M4 (resets the M4 and restarts from 0x0)

Next will rebuild and see if M4 will single step...



5 comments:

  1. JTAG is now working. More work is needed to load the M4 without fist loading the code via A9 and Linux.

    Here is the config file:

    transport select jtag
    # Slow speed to be sure it will work
    adapter_khz 1000


    if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
    } else {
    set _CHIPNAME imx6sx
    }


    # CoreSight Debug Access Port
    if { [info exists DAP_TAPID] } {
    set _DAP_TAPID $DAP_TAPID
    } else {
    set _DAP_TAPID 0x4ba00477
    }

    jtag newtap $_CHIPNAME dapM4 -irlen 4 -ircapture 0x01 -irmask 0x0f \
    -expected-id $_DAP_TAPID
    jtag newtap $_CHIPNAME dapA9 -irlen 4 -ircapture 0x01 -irmask 0x0f \
    -expected-id $_DAP_TAPID
    jtag newtap $_CHIPNAME sdma -irlen 5 -ircapture 0x0 -irmask 0x0f \
    -expected-id 0x1
    jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0f \
    -expected-id 0x0891C01D
    target create imx6sx.dapM4 cortex_m -chain-position imx6sx.dapM4


    imx6sx.dapM4 configure -event "reset-assert" {
    echo "Reseting ...."
    #cortex_a dbginit
    }

    imx6sx.dapM4 configure -event reset-init { m4_init }


    proc m4_init { } {
    echo "Reset-init..."
    ; # halt the CPU
    halt

    dap apsel 0
    cortex_m reset_config vectreset

    }

    ReplyDelete
  2. Hello Tim

    Do you know if I can debug the cortex M4 with Segger J-Link?

    ReplyDelete
  3. sudo ./src/openocd -f interface/ftdi/jtagkey.cfg -f ./tcl/target/imx6sx.cfg


    -f interface/ftdi/jtagkey.cfg (this the JTAG interface to use, instead use the jlink interface.)

    Also, need to compile openocd with jlink interface enabled

    ReplyDelete
  4. Hi Tim,

    Would you please show me where the config script opens clock gate and activates the M4 core. As Segger said that, A9's debug session must be opened first and does somethings to enable M4 core before connect it with JTAG ?

    ReplyDelete
    Replies
    1. I use the program to load the code into M4 from A9 to configure the the gate.

      Delete